Interface Circuits
Machine Learning Circuits and Systems
“Our group’s research is focused on innovation at the analog-to-digital interface and its computational back-end. Our work spans signal conditioning circuits for sensors, high-speed wireline & RF transceivers, as well system-driven circuit design for data-compressive interfaces and embedded machine learning.”
P. Caragiulo, A. Ramkaj, A. Arbabian, and B. Murmann, “A 56 GS/s 8-bit 0.011 mm2 4x Delta-Interleaved Switched-Capacitor DAC in 16 nm FinFET CMOS,” to appear, IEEE European Solid-State Circuits Conference, Sep. 2022.
K. Prabhu, A. Gural, Z.F. Khan, R.M. Radway, M. Giordano, K. Koul, R. Doshi, J.W. Kustin, T. Liu, G.B. Lopes, V. Turbiner, W.-S. Khwa, Y.-D. Chih, M.-F. Chang, G. Lallement, B. Murmann, S. Mitra, and P. Raina, “CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference,” IEEE J. Solid-State Circuits, vol. 57, no. 4, pp. 1013-1026, Apr. 2022.